This invention relates to a display apparatus, and more particularly to improvements in or relating to a horizontal driving circuit built in an active matrix display apparatus of the dot-sequential driving type.
A related-art display apparatus typically has such a configuration as shown in FIG. 7. Referring to FIG. 7, the related-art display apparatus shown includes a panel 33 in which a pixel array section 15, a vertical driving circuit 16, a horizontal driving circuit 17 and other necessary circuits not shown are formed in an integrated manner. The pixel array section 15 includes gate lines 13 extending along rows, signal lines 12 extending along columns and pixels 11 disposed in rows and columns at intersecting points of the gate lines 13 and the signal lines 12. The vertical driving circuit 16 is disposed divisionally on the opposite left and right sides of the pixel array section 15 and connected to the opposite ends of the gate lines 13 to successively select the rows of the pixels 11. The horizontal driving circuit 17 is connected to the signal lines 12 and operates in response to a clock signal of a predetermined period to successively write an image signal into the pixels 11 of the selected row. The related-art display apparatus further includes an external clock production circuit 18 which generates clock signals HCK and HCKX which are used as a reference to operation of the horizontal driving circuit 17 and clock signals DCK1 and DCK2 having an equal period to but having a lower duty ratio than those of the clock signals HCK and HCKX. It is to be noted that the clock signal HCKX is an inverted signal of the clock signal HCK. Further, though not described particularly herein, also inverted signals DCK1X and DCK2X of the clock signals DCK1 and DCK2 are supplied as occasion demands. The external clock production circuit 18 supplies the clock signals and a horizontal start pulse HST to the panel 33 side. It is to be noted that a precharge circuit 20 is connected to the signal lines 12 such that it performs precharge of the signal lines 12 preceding to writing of an image signal to improve the picture quality.
[Patent Document 1] Japanese Patent Laid-open No. Hei 8-286639
[Patent Document 2] Japanese Patent Laid-open No. Hei 7-295520
The horizontal driving circuit 17 is connected to the signal lines 12 and operates in response to the clock signals mentioned hereinabove to successively write an image signal into the pixels 11 of the selected row. More particularly, the horizontal driving circuit 17 successively samples an image signal supplied thereto from the outside and holds the sampled signals to the signal lines 12. In the sampling and holding process of the image signal, charge and discharge occur with each of the signal lines 12, and noise is generated thereby. The charge and discharge noise has such a bad influence that a display defect in the form of a vertical stripe appears along the direction of a column of the pixel array section 15. Such a display defect in the form of a vertical stripe as just mentioned which arises from charge and/or discharge noise of a signal line is hereinafter referred to sometimes as “vertical stripe” In order to suppress a vertical stripe, conventionally a precharge circuit 20 is built in the panel 33. The precharge circuit 20 precharges the signal lines 12 prior to sample holding of an image signal to suppress generation of charge and/or discharge noise. The precharge improves the picture quality such as the uniformity of the screen.
With the related-art precharge of signal lines for which a precharge circuit is used, however, a vertical stripe cannot always be removed fully, and further improvement in the uniformity is demanded. Further, where the precharge circuit is built in the panel, increase of the area of the circuit board as much cannot be avoided, and this is not preferable from the point of view of the yield. In addition, the provision of the precharge circuit separately from the horizontal driving circuit unfavorably increases the cost.